The present invention relates to a wiring board and a fabrication method for a wiring board, and more particularly to a multilayer wiring board and fabrication method therefore suitable for electronic devices in which large scale circuits are incorporated with high density, for example electronic devices necessary for processing electric signals at high speed which includes electronic computers and electronic exchangers, wherein the multilayer wiring board is formed with a shield structure for preventing the permeation of gas or moisture.
Recently developed electronic devices greatly depend on a mounting technique for incorporating a large number of large scale integrated circuits (LSIs) in a limited space. Along with this trend, thin film multilayer wiring layers using insulating layers made of a material having low dielectric, such as organic resin, have been formed on a printed board or thick film ceramic board conventionally used to mount LSIs. Moreover, to further enhance the mounting density, there have been strong demands to make fine the wiring structure and to make multiple the wiring layers. As a consequence, it has become important to ensure the reliability of the wiring.
A fine wiring is susceptible to wiring failure called electric corrosion due to the carrying of current in the presence of moisture. The reason for this is that, the potential gradient between wirings becomes larger as the distance between the wirings is shortened, so that metal forming each wiring is ionized due to the presence of the electric field and water. This ionized metal is susceptible to elution, and the ions thus eluted is moved by the attractive force of the electric field and is precipitated causing defects in the wiring and adhesion of the metal to the wiring. Thus, breaks in the wiring and short circuits occur between the wirings.
To prevent the elution of the metal ions described above, wirings have been generally sealed to prevent the permeation of water. A method of sealing the whole wiring board by resin has been adopted in the case where air-tightness is not strictly required.
However, currently there has been the trend to make fine the wiring and to enhance the density of the wiring, requiring the board to be cooled for suppressing the heat generated by the wiring and electronic devices mounted on the board. The air-tight sealing by resin makes it impossible to sufficiently cool the board. Moreover, when LSIs and the surface of the wiring board on which the LSIs are mounted are dipped in an inert gas such as N2 or He, or in an inert insulating liquid such as freon for cooling the LSIs, the air-tight sealing to a level higher than what is possible with resin is required for preventing the permeation of gas or liquid.
Moreover, due to the fineness of the wiring in recent years, even water in trace amounts have caused breakages and shortages of the wiring. As a result it is now standard for the wiring board to prevent the permeation of moisture to a level higher than that possible when the sealing by resin allows.
Thus, currently fine wirings have been sealed not using the air-tight sealing of resin but using an air-tight sealing structure called hermetic seal. This structure is to perform the sealing using a cap made of ceramic or metal.
The cap is occasionally joined on a board using adhesive, but for ensuring perfect air-tightness, it may be preferable to join the cap using brazing filler metal (solder). Conventionally, when the above cap is joined on the board using the brazing filler metal, the board is generally a ceramic board. Namely, a resin made board or resin made insulating layer is not used because the melting point of the brazing filer metal is high compared with the organic material and also the permeation of water content through the board must be prevented.
The problem of heat-resistance can be solved by the adoption of a polyimide resin which can withstand high temperatures near 400.degree. C. However, the polyimide resin is high in moisture permeability. Currently it is not known of any other practical resin having excellent air-tightness to perfectly prevent the permeation of moisture. Accordingly, the surface of the resin made board or the organic insulating layer can not be directly sealed.
Thus, in the conventional hermetic seal structure, the outer peripheral portion of the board must be sealed to be air-tight. In this regard, the conventional hermetic structure has a disadvantage in requiring a large area on the board. To cope with this disadvantage, Japanese Patent Laid-open No. 63-175450 has disclosed a multilayer wiring board sealed by the improved hermetic seal structure shown in FIG. 8.
Japanese Patent Laid-open No. 63-175450 as illustrated in FIG. 8 provides an air-tight seal structure including a ceramic wiring board 1, multiple wiring layers 2 having organic insulating layers formed on the ceramic wiring board 1, and a semiconductor chip 7 mounted on the multiple wiring layers 2 through a solder bump 8, wherein the air-tight sealing is performed using a cap 5. In this method, the above multiple wiring layers 2 are sealed air-tight by the steps of partially removing the multiple wiring layers 2 formed on the surface of the ceramic board 1, forming a metal layer 3 on an exposed surface la of the ceramic board and on an exposed surface 2a of the multiple wiring layers, and joining the sealing cap 5 to the metal layer 3 with a brazing filler material 4.
However, the above sealing method has a disadvantage that the organic insulating layers on the surface 1a of the ceramic board and on the surface 2a of the multiple wiring layers are not always perfectly removed thereby causing bonding failure due to the residue of the organic matter. Moreover, the above method requires the steps of removing the organic insulating and forming a metal layer on the areas removed. Thus, the above method increases the number of steps required for fabrication. Additionally, for brazing the cap 5, a metal layer having a width of 5 to 6 mm is required, thereby enlarging the loss in area. This loss in area further constrains the available area for the fine integration of circuits.